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High performance multi-junction VCSELs for LiDAR applications

High performance multi-junction VCSELs for LiDAR applications

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  • Time of issue:2022-04-26
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(Summary description)The progress on high performance multi-junction VCSEL array emitting around 940 nm is reported.

High performance multi-junction VCSELs for LiDAR applications

(Summary description)The progress on high performance multi-junction VCSEL array emitting around 940 nm is reported.

  • Categories:Company News
  • Author:
  • Origin:
  • Time of issue:2022-04-26
  • Views:0

Heng Liua, Pei Miaoa, Yao Xiaob, Chang Liub, Zhicheng Zhangb, and Jun Wanga,b,* aSuzhou Everbright Photonics Co., LTD, Suzhou, Jiangsu, P. R. China,bSichuan University, Chengdu, Sichuan, P. R. China


High power density VCSELs are attracting attentions in the field of LiDAR applications. Multi-junction VCSEL is the key technology to obtain high power density. High slope efficiency, high filling factor and small divergence angle are the straight-forward research directions to realize this high performance multi-junction VCSEL array. We optimize the epitaxial design and fabrication process, such as tunnel junction, oxidation layer and array layout. The progress on high performance multi-junction VCSEL array emitting around 940 nm is reported. Selectively oxidized, top-emitting VCSEL emitter array with 59.7% power conversion efficiency and slope efficiency of 8.3 W/A are developed as the basic laser source targeting at the LiDAR applications. The fabricated VCSEL array devices with emitting area of 234*250 um2 exhibit power density higher than 1800 W/mm2 and divergence angle lower than 21 degree (1/e2) with 15A peak current, 10kHz 10 nano-second pulsed (FWHM) driver.

Keywords: LiDAR, VCSEL array, Multi-junction, High power density, Low divergence angle


In recent years, as Light detection and ranging (LiDAR) technology develops, VCSEL array beam sources are attracting  attentions  in  the  field  of  LiDAR  applications1,2  due  to  the  advantages  of  low  manufacturing  cost, small wavelength shift coefficient and easy integration into two dimensional array. Besides these, with special structure and fabrication designs, VCSEL arrays can achieve higher power density and lower divergence angle to satisfy the rapid development of LiDAR applications for long distance conditions. Targeting these products, higher gain introduced by multi-junction VCSEL is the key technology to obtain high efficiency and high power density. Secondly, using some special structure designs, such as modifying the position, thickness and Al concen- tration of the oxidation layer, the divergence angle can be further improved. At last, higher filling factor means lower emitting area, which also benefits higher output power density. Considering the nano-second short pulse condition, thermal accumulation of VCSEL arrays is negligible. Large oxidation aperture and small pitch size can be used to enhance the filling factor.

In this work, high power density and low divergence angle VCSEL arrays are realized by optimizing the epitaxial structure design and fabrication process. With 100Hz 10 micro-second (us) wide pulse current driver for wafer scale, VCSEL arrays with maximum power conversion efficiency as high as 59.7% and slope efficiency as high as 8.3 W/A are fabricated. Besides, with 10kHz 10 nano-second (ns) short pulse current driver for device scale, VCSEL array devices with more than 110 W output peak power, corresponding to more than 1800 W/mm2  of power density, and divergence angle of 21 degree are reported.


2.1 Application demands

LiDAR technology, a laser-based imaging technique for accurate distance measurement, is considered as one of  the  most  momentous  sensor  technologies  for  several  applications,  such  as  intelligent  driving,34  3D  sensing.5  As the detection distance goes further, Point Cloud (PC) density will become lower, and the resolution will be limited. To realize the goal of construction of 3D screening in long distance detection, high quality laser beam is required, such as high power density, low divergence angle.

The design concept is showed in Fig. 1.   With ns short pulse current driver,  multi-junction VCSEL array    with low divergence angle, provides a solid platform for LiDAR applications. Based on this concept, we design and fabricate state-of-art multi-junction VCSEL array (5/6/8 junctions) with specific oxidation layer and filling factor design to realize the high power density and low divergence angle performance for LiDAR applications.

Figure 1. LiDAR applications based on multi-junction VCSEL array with high power density and low divergence angle

2.2 Product design
2.2.1 Efficiency optimization

In order to get an improved Power Conversion Efficiency (PCE) and Slope Efficiency (SE), multi-junction design is used to increase gain volume by stacking several active regions, multi-quantum wells (MQWs), in one cavity. We use multi-junction design with low resistance and low absorption tunnel junctions (TJs), and also we achieve precise layer thickness control to align MQWs and TJs with peaks and valleys of standing wave in cavity for gain and loss optimization. The schematic and equivalent circuit model of our typical LiDAR products based on 6 junctions VCSEL array are showed in Fig. 2.


Figure 2. 6-junction VCSEL and equivalent circuit model

2.2.2Divergence angle optimization

In the typical multi-junction VCSEL, the divergence angle will be increased by applying more TJs and MQWs in one cavity.  From others’ work6  and our simulation and experiments, the divergence angle of VCSEL array is associated with several specifications of oxidation layer, such as location, thickness, Al concentration, and the quantity, as shown in Fig. 3. According to the effective refractive index model, the above factors would affect the effective refractive index contrast between the ”core” (central area) and the ”cladding” (oxidized area). Further, different gain and loss ratio in different areas will be introduced, and the transverse fundamental mode and transverse high order modes distribution will change. With large portion of transverse fundamental mode benefits the divergence angle performance.


Figure 3. Multi-junction VCSEL and equivalent circuit model

2.2.3 Filling factor optimization

Filling factor is defined as the total emitting window area divided by the total emitting area. The total emitting window area is associated with the oxidation aperture of each emitter, and the total emitting area is associated with the outer area of the beam array.

where F is the filling factor, r is the radius of oxidation aperture, N is the emitter number, AL is the length of the total emitting area, and Aw is the width of the total emitting area.

where J is the current density, and Io is the operating current.

From Equations (1) and (2), with a giving total emitting area, low filling factor will cause high current density, which forces the emitter working at relatively high current density mode. Working at high current density, the possibility of breakdown will increase and the reliability will be affected. Second, with high current density,  the gain saturation might show up earlier, even lower than the operation current for LiDAR applications, and PCE and SE will be impacted. Third, with high filling factor, the serial resistance goes lower, which gives more flexibility on driving voltage of the driver board. We adjust the oxidation aperture size, the mesa size and the pitch of the emitter array to realize VCSEL array layout with high filling factor, as shown in Fig 4c. In Fig. 4, from a,b to c, the filling factors are 27.0%, 42.0%, and 48.8%, respectively.


Figure 4. Filling factor optimization strategy. (a) Layout design of filling factor of 27.0%, (b) Layout design of filling factor of 42.0%, (c) Layout design of filling factor of 48.8%,

2.2.4 Fabrication

The fabrication process flow for multi-junction VCSEL is showed in Fig. 5.

Process flow starts from epitaxial growth with MOCVD on GaAs substrate.
Ti and Si3N4 are deposited on the substrate side for stress compensation.  p type contact metals are deposited on top of p+ contact layer of p side.
Mesa is formed by dry etching with chlorine based gases.
Oxidation aperture is generated by furnace.
Si3N4  passivation layer is deposited by PECVD for isolation.
Holes on top passivation layer are also dry etched by ICP-RIE for current injection.
Gold plating after seed metal deposition is done for current injection.
After grinding and polishing the substrate, n type contact metals are deposited on n side.

Figure 5.   Process flow



3.1High efficiency

We fabricate VCSEL arrays with different stacking active regions of 5, 6, and 8 junctions. The comparison between 5/6/8 junctions VCSEL array with 100Hz 10us pulse current driver is showed in Fig. 6. With more junctions design, the slope efficiency increases from 4.9 W/A, 5.9 W/A to 8.3 W/A, as shown in Fig. 6a. And also, the maximum PCE for VCSEL array is enhanced from 48.7%, 56.5% to 59.7%, as shown in Fig. 6b.

Figure 6. LI and PCE curves for 5/6/8 junctions VCSEL array with 100Hz 10us pulse current driver. (a) LI curves for 5/6/8 junctions VCSEL array, (b) PCE curves for 5/6/8 junctions VCSEL array.

3.2 Low divergence angle

In order to prove the divergence angle improvement design with different oxidation layer location, we enlarge the waveguide layers thickness, and set the optical distance between oxidation layer and MQWs as 0.25lambda, 0.75lambda, and 1.25 lambda. As shown in Fig. 7, with 10kHz 10ns short pulse current driver, the divergence angle is optimized from 27.9, 26.6, to 24.6 degrees, respectively.

Figure 7. Divergence angle for different oxidation layer locations with short pulse current driver

3.3 High filling factor

We fabricate 5 junctions VCSEL array with the layout design A/B/C showed in Fig. 4, and the design of different oxidation aperture size with varied mesa size is also applied in this experiment. Considering a giving VCSEL array layout, LI curves with different oxidation aperture size of 8um 10um and 12um, are showed in Fig. 8a. With 10kHz 10ns short pulse current driver, with small aperture size, such as 8 um, PCE is impacted due to relatively high current density. Besides, the corresponding LI curves for Design A, B, C of filling factors 27.0%, 42.0%, and 48.8% are showed in Fig. 8b with 10kHz 10ns short pulse current driver. In some range, SE can be enhanced with larger filling factor layout design.

Figure 8. LI performance with different filling factors. (a) LI curves of layout design with different oxidation aperture size, (b) LI curves of layout design A, B and C with different filling factor



4.1Performance of optimized 8-junction VCSEL array

With all the mentioned optimization strategy, including the optical distance between oxidation layer and MQWs, the thickness, Al concentration and quantity of oxidation layer, and the filling factor of the layout design, we fabricate the 8 junctions VCSEL array with high power density, high slope efficiency, and low divergence angle. The performance is measured with 10kHz 10ns short pulse current driver, as shown in Fig. 9.

Figure 9. Performance of 8 junctions VCSEL arrays under short pulse tests. (a) LIV curve, and the sub-figure giving the pulse shape, (b) Spectrum, (c) Far-field (FF) distribution, (d) Cross-section intensity distribuiton of FF along x direction

Considering the test condition of nano-second pulse, there is barely thermal accumulation. In order to study the array performance with different temperature, we use TEC (Thermo Electric Cooler) to provide a higher environmental temperature from 30C to 80C. With 10kHz 10ns short pulse current driver, the LI, FF and Spectrum performance of 8 junctions VCSEL array is showed in Fig. 10. As show in Fig. 10a, the fabricated 8 junctions VCSEL array shows great stability. With a giving working peaking current at 15A, the variation of power is less than 8%, which is showed in Fig. 10b. The wavelength shift with varied temperature is plotted is Fig. 10c, and the coefficient showed in Fig. 10d is around 0.07 nm/C.

Figure 10. Performance of 8 junctions VCSEL arrays with varied temperature. (a) LI curve with varied temperature, (b) the relationship between power and temperature with a giving operating peak current of 15A, (c) Spectrum with varied temperature, (d) the wavelength shift coefficient with temperature


 4.2 the ability of high volume fabrication product line for VCSEL chips

For LiDAR application products, on wafer scale, in Fig. 11, it shows the uniformity and repeatability of PCE and wavelength distribution on 6 inch wafers, which proves great compatibility with the facility of the 6 inches wafer production line in Suzhou Everbright Photonics Co., LTD.

Figure 11. Uniformity and repeatability of 6 inch wafers of VCSEL array



In this work, high power density and low divergence angle multi-junction VCSEL array for LiDAR application had been designed and fabricated. We design and optimize the performance to realize VCSEL array with the maximum PCE of 59.7%, slope efficiency of 8.3 W/A. The tests are under the condition of 100Hz 10us wide pulse current driver. For 8 junctions VCSEL array products, at the operating condition of 15A peak current 10kHz  10ns  short  pulse  driving,  the  power  density  reaches  as  high  as  1800  W/mm2,  and  the  divergence  angle is  less  than  21  degrees  (1/e2).   The  wavelength,  power  density,  divergence  angle,  and  other  main  performance specifications of VCSEL array can be designed and customized according to the specific customer application requirements.


The authors would like to thank the entire VCSEL team members in Suzhou Everbright Photonics for their efforts in design, fabrication, packaging and testing the wafers and devices.


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[4]    Warren, M. E., Podva, D., Dacha, P., Block, M. K., Helms, C. J., Maynard, J., and Carson, R. F., “Low- divergence high-power vcsel arrays for lidar application,” Proc. SPIE 10552, 105520E (2018).
[5]    Moench, H., Gronenborn, S., Gu, X., Gudde, R., Herper, M., Kolb, J., Miller, M., Smeets, M., and Weigl,  A., “Vcsels in short-pulse operation for time-of-flight applications,” Proc. SPIE 10552, 105520G (2018).
[6]    Yuen, A., Barvem, A. V., Zhao, G., and Hegblom, E. R., “Controlling beam divergence in a vertical-cavity surface-emitting laser,” United States Patent Application Publication , US 2019/0067906 A1 (2019).

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