Abstract

High power diode lasers are widely used as the pump sources for fiber lasers and solid-state lasers, or the light sources for direct diode laser systems. To meet the emerging needs of fiber lasers, solid state lasers and direct diode laser systems, diode lasers are moving towards higher volume manufacturing, along with higher performance and lower cost. In this paper, we will present our progresses in these areas. We have set up a 6" GaAs wafer production line for high power diode laser chips, which includes MOCVD epitaxy and wafer fabrication. With the 6" wafer production line, we are producing multi-million chips per month for fiber laser pumping. The 6" wafers show great uniformity and reproducibility. Device performance is outstanding, with near 70% efficiency and high CW roll-over power.

Keywords: High power, Diode laser, Volume manufacturing, 6" Wafer, GaAs fabrication

1.INTRODUCTION

High power diode lasers are widely used as the pump sources for fiber lasers and solid-state lasers, or the light sources for direct diode laser systems ^[1-5]. To meet the emerging needs of fiber lasers, solid state lasers and direct diode laser systems, diode lasers are moving towards higher volume manufacturing, along with higher performance and lower cost. The main efforts to increase volume has been to use substrates with larger dimensions and employ automation. In the last two decades, the dimensions of GaAs substrates has been increased from 2" to 6" for high power diode laser products. While the chip quantity per wafer would have been increased dramatically using 6" wafers, the uniformity and the reproducibility become more critical to high volume production. In this paper, we present the latest progress on 6" wafer production line at Everbright Photonics Co. Ltd., which produces multi-million chips per month for fiber laser pumping. The uniformity and reproducibility of epitaxial and fabricated 6" wafers will be detailly presented. High power laser device’s performance will also be reported.

2.MOCVD epitaxy

Suzhou Everbright Photonics Co., Ltd. has established an integrated production line for 6" GaAs wafers, which include epitaxy and wafer fabrication, as well as device assembly, testing and burn-in. The epitaxy section uses multiple Aixtron's 2800 G4 reactors. The reactors are designed to have high uniformity and high throughput, as well as good uptime. They are configured to grow eight 6-inch wafers per run. Based on suggested baseline processes from the manufacturer, Everbright Photonics Co. Ltd. has done further process development to improve material uniformity and repeatability ^[6,7]. We studied various factors that influence the growth rate uniformity through simulations and experiments. Simulation modeling is performed using CVD Sim software ^[6]. Gas-phase and surface chemical reaction kinetics, gas transporting and thermodynamics are included in the model. Figure 1(a) illustrates that the modeling of a planetary 8x6" MOCVD reactor. An example of modeling results, showing MMAl distribution on a 6" substrate under two different AsH₃ injection configurations, is shown in Figure 1(b).

Figure 1. The modeling of a planetary 8x6" MOCVD reactor. (a) Gas concentration and temperature 2D images in the reactor. (b) An example of modeling results, showing MMAl distribution on a 6" substrate under two different AsH₃ injection configurations.

Factors that affect the growth rate include wafer curvature and temperature distribution on the surface. Figure 2(a) shows the curvature distribution among the 8 wafers during the growth of a 9xx nm structure. As seen, the curvatures are kept at below 20km^-1, with the variation being less than ±30% among the wafers. Figure 2(b) displays the temperature distribution of each wafer during the same growth run. The temperature of each wafer is high at the center and low at the edge. The variation of average temperatures from each wafer is less than 2°C. Figure 3 is the photoluminescence (PL) mapping spectrum of a 9xx LD epitaxial wafer. The standard deviation of the PL wavelength across the entire 6" wafer is only 0.56nm.

Figure 2. MOCVD process monitoring. (a) The curvature distribution of the 8 wafers from one run, (b) The temperature distribution of the wafers during the growth of 9xx nm epitaxial structures.

Figure 3. The PL peak wavelength mapping of the 9xx nm epitaxial wafer.

Another important parameter for epitaxy is material composition. High resolution XRD is used to exam the composition of 9xx LD epitaxial wafers. Three test points along the radial direction are measured with coordinates (0,0), (65,0) and (70,0) mm. It is found that the deviation of the absolute Al content from 60% target is smaller than 1%. With statistical process control applied, the Al content of the AlGaAs cladding layers is controlled to be within ±2%, as shown in Figure 4.

Figure 4. GaAs composition variation for wafers grown over a 6-month period. Each data point represents one growth run.

To achieve high operation power and electro-optical conversion efficiency, the epitaxy layer structure has been designed elaborately in terms of doping level, layer composition and thickness. The doping profiles is important, especially for the p-side waveguide and cladding layers. Figure 5 shows the relative carrier concentration in AlGaAs cladding layer of a 9xx nm wafer measured by ECV (Electrochemical Capacitance-Voltage). The measurements are carried out at four locations that are spaced from center of the wafer to 65mm away from the center in radial direction. The carrier concentration is normalized by the value at center of the wafer. The variation of carrier concentrations among the four test points is about 15%.

Figure 5. The relative carrier concentration of the P-AlGaAs cladding layer along the radial direction.

Defects in the epitaxy layers are major root causes for device’s bulk catastrophic optical damage (COD) failure mode. Thus, the epitaxy defect control is extremely important during the growth process. The defects have been well controlled with proper maintenance and chamber conditioning. Figure 6(a) shows a typical defect distribution cross a 6" wafer. The dimensions of defects range from 0.1 to 20 μm, with total defect density being round 0.475/cm². Figure 6(b) is the plot of defect densities of 650 wafers grown over a certain period. The average surface defect density of these wafers is 0.77/cm². The percentage of epitaxial wafers whose surface defect density exceeds 3.0/cm² control limit is only 2.1%.

Figure 6. Defect density of wafers. (a) The defect distribution on the surface of the 9xx LD epitaxial wafer. (b) The statistical process control of average surface defect density versus wafer growth number. One data is from one growth run.

3.Wafer fabrication

Most of our 6" wafer fabrication processes are equipped with automatic systems to increase throughput and yield. Steppers and trackers are used for photo-lithography. Dry-in and dry-out wafer cleaning and wet etching machines are used to reduce the liquid and particle contamination. Electron beam evaporation and sputtering are used for the deposition of metal film. PECVD is used for dielectric films. Lapping, polishing and annealing are done with semi-automatic equipment. After the completion of fabrication processes, all wafers go through automatic optical inspection to track and classify defects down to each chip. Benefited from these automatic equipment, the throughput of our wafer Fab can reach more than one hundred of 6" wafers per day.

The key processes of wafer fabrication include photo-lithography, mesa etching, dielectric thin film deposition, metallization and so on. Among these processes, the mesa etching is the most crucial one. The etching depth determines the near field and far field patterns in slow axis direction, which eventually affect fiber coupling efficiency in fiber modules. Figure 7(a), shows the etching depth variation of a 6” wafer, with 9 measurements along the diameter direction. The data shows that the etching depth varies within ±0.5%. Meanwhile, the average etching depth varies less than 3% from wafer to wafer, as shown in Figure 7(b).

Figure 7. Mesa etching depth variation. (a) Within a 6" wafer, (b) From wafer to wafer, each data point representing a relative range of mesa depths of a wafer.

For dielectric film deposition, we focus on three aspects, thickness, refractive index and stress between the film and substrate. Gas flow ratio, temperature and pressure in a PECVD reactor are studied to improve the uniformity. Figure 8(a) shows that the thickness across a 6" wafer is lower than 5%. The refractive index is controlled within 1.47±0.01. At the same time, the stress of the film is controlled within ±10% away from a target. Figure 8(b) shows the thickness non-uniformity of the dielectric film over a certain period, which is less than 5%.

Figure 8. The characteristics dielectric film. (a) Silicon oxide normalized thickness within a 6" wafer. (b) Non-uniformity of silicon oxide thickness over a certain period with one data point from one wafer batch.

The p-metal film is deposited by automatic sputtering equipment. The process parameters, including plasma power, and the distance between target and plasma source, are optimized to improve the thickness uniformity. Under optimized conditions, the thickness non-uniformity within 6" wafers over a 6-month period is less than 3.5%, with an average value of 0.9%, as shown in Figure 9.

Figure 9. Non-uniformity of metal film thickness over a certain period, with one data point from one wafer batch.

Wafer lapping and polishing is challenging for 6" wafer processing as larger wafer size would result in more wafer breakage. We use semi-automatic wafer bonding/debonding and automatic lapping/polishing equipment to deal with the problem. Wafers are bonded onto carriers for the process. For various device product designs, the thicknesses of wafers are designed to be from 100μm to 150μm.Figure 10 shows the thickness variation among various wafer lots within 15μm.

Figure 10. Wafer thickness after lapping and polishing over a certain period, with one data point representing average thickness of a wafer.

After wafer fabrication process. The wafers are cleaved into bar/chips, then passivated with proprietary facet protection technology and coated with low/high reflectivity films on front/rear facets. Automatic bar stacking, optical inspection and chip sorting are employed to improve the throughput. The monthly throughput for single emitter chips is more than multi-million at the moment and is keeping ramping up.

4.Device performance and reliability.

High power laser chips or bars are assembled onto proper sub-mounts according to their sizes, power and applications. Chip die bonding, wire bonding, inspection and testing are carried out with automatic systems, with most of inspection and testing systems being homemade.

4.1     Device performance

Everbright Photonics Co. Ltd.’s diode laser products include bars and single emitter chips with wavelength ranging from 750nm to 1060nm mainly. Here, we present key performance data from some of typical products.

808 nm laser bars are the most popular product for solid-state laser pumping. Laser bars with cavity length of 1.5mm and fill factor of 80% is manufactured in volume. The laser bars are bonded onto micro-channel-cooler (MCC) and tested under quasi-CW condition, with 200μs pulse width, 400Hz repetition frequency, and 25℃ cooling water temperature. Optical power and electro-optical conversion efficiency versus operation current is shown in Figure 11. As seen, the optical power is higher than 560W at 450A, with peak electro-optical conversion efficiency reaching 67%. Electro-optical conversion efficiency under 500W operating conditions is above 60%, which is the highest to our best knowledge. The devices work under TE polarization mode.

Figure 11. Optical power and efficiency versus operation current of a 808nm laser bar.

Single emitter lasers in 885-980nm wavelength range are used for high brightness solid and fiber laser pumping. This type of laser uses AlGaAs for the waveguide layer and AlGaInAs for quantum well. The epitaxy structure is designed to have low internal optical loss and series resistance through fine turn of the doping level and waveguide guide composition ^[8,9]. Also, the structure is designed with asymmetric large waveguide, having large optical spot size to lower facet optical load.

One type of the chips is with emitter width of 230μm and cavity length of 4.5mm for up to 30W operation. Figure 12(a) shows the CW optical power and electro-optical conversion efficiency of 885nm, 915nm and 980nm ones at 25℃ heat sink temperature. For all these chips, the optical power is over 30W, with electro-optical conversion efficiency higher than 65%. The devices are tested up to 60A, showing power rollover while without COD. The rollover power is closed to 45W, as shown in Figure 12(b) . The high rollover power/current indicates high device quality.

Figure 12. Optical power and electro-optical conversion efficiency of single emitter lasers in 885-980nm wavelength range. (a) Optical power and electro-optical conversion efficiency of 885 nm, 915nm,980nm single emitter laser chip. (b) CW test to rollover of 915nm laser.

The device performance of laser chips over a wafer is very uniform. Figure 13(a) shows wavelength mapping of 980nm 30W laser chips from a 6" wafer. It shows no obvious variation along radial direction. The standard deviation of wavelength across the wafer is about 0.5nm. The optical power and electro-optical conversion efficiency for chips from the same wafer are also presented in Figure 13. As seen in Figure 13(b) and 13(c), the variations of power and electro-optical conversion efficiency within the wafer are less than 2%. These results are owing to the high-quality wafer fabrication processes, in additional to MOCVD process.

Figure 13. The performance data mapping of chips from a 6" 980nm wafer, measured at 25℃. (a) Wavelength, (b) Optical power, (c) Electro-optical conversion efficiency.

The reproducibility of the wafer/chips over long period is also represented. The average output power from all chips over each 6" wafer is plotted in Figure 14 for 800 wafers that are processed consecutively. The standard deviation of the optical output power variation is about 1.5% for these 800 wafers. This great long-term power reproducibility represents good control on epitaxy, fabrication and facet coating.

Figure 14. Average output power from all chips over 6" wafers, with one data point representing the average output power of a wafer.

Our 6" MOCVD epitaxy and wafer fabrication production line not only produces high power edge emitting laser chips, but also covers some part of VCSEL (Vertical Cavity Surface Emitting Laser) manufacturing. The VCSEL epitaxial wafer contains hundreds layers, whose performance is very sensitive to the thickness, doping and interface quality. We produce VCSEL arrays for Lidar and 3D sensing applications. Usually, each array consists of hundreds of emitters. Their mesa etching, dielectric film and metallization processes have more direct effects on device performance than edge emitting ones. Figure 15 shows the wavelength mapping and electro-optical conversion efficiency of arrays from a 940nm VCSEL wafer. Each array has optical power of 3W. The standard deviation of wavelength across the wafer is 0.9 nm, while the non-uniformity of electro-optical conversion efficiency is about 2.5%. These data further support that our 6" wafer fabrication has high uniformity and high reproducibility.

Figure 15. The lasing peak wavelength and electro-optical conversion efficiency mapping of 940nm 3W VCSEL chips from a 6" wafer.

4.2     Reliability

Accelerated life test has been performed to assess the long-term reliability of the laser chips. Figure 16 shows a group of accelerated lifetime data at 28A driving current. This group contains 24 chips, which are sampled from mass production line. The driving current is fixed at 28A, which corresponding to 30W optical power at room temperature, while the junction temperature is elevated to 90℃. The optical power is measured and recorded during the life test. The lifetime has accumulated over 6500 hours and is still ongoing. The normalized power P/P₀ versus time is plotted. As seen, there is neither sudden failure nor noticeable gradual degradation for all the devices. Based on acceleration model with an activation energy of 0.45eV ^[4,5,10], an accelerate factor of 5.5 is calculated. Then, the equivalent lifetime is about 36000 hours under 30W and room temperature operating condition.

Figure 16. Accelerated lifetime at 28A driving current and 90℃ junction temperature.

5.Conclusion

We have built a high quality and high throughput 6" high power laser chip production line. Its critical aspects of MOCVD epitaxy and wafer fabrication have been reported, showing high uniformity and reproducibility. This production line is manufacturing multi-million high power laser chips per month, in addition to VCSEL arrays. 808 nm laser bars have optical power over 500W. 88x-9xxnm single emitter chips have rated optical power over 30W and peak efficiency exceed 70%, with CW rollover power up to 45W. In addition, the high-power single emitter chips have undergone accelerated life testing, demonstrating good long term reliability.

acknowledgements

The authors wish to thank a number of coworkers who have contributed to the 6" GaAs production line.

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